Syntax: XCHG Rhp Where Rhp is higher order register the pair. ( BC or DE) Byte: 1byte Addressing Mode: Register Addressing Working: for execution of this instruction, microprocessor will allocate first byte for opcode and the operand is register which don't need allocation. After execution of this instruction content of register pair given as operand will get swapped with content of HL register pair . Example: XCHG B where [C]= 50H & [B] = 20 H, [H]= 80H & [L]= 60H (i.e. BC = 2050H and HL = 8060H) After execution of XCHG B [H]= 20 H & [L]= 50H [B]= 80H & [ C ]= 60H Program: Write ALP to swap content of BC with DE where [DE] = 4455H and [BC] = 1122H. Solution: Assume HL = 0000H Start: XCHG B ;BC= 0000H & HL = 1122H XCHG D ; HL= 4455H& DE= 1122H XCHG B ; HL = 00...
Syntax: MVI Rd,8-bit Where Rd can be any of the general purpose registers (A,B,C,D,E,H andL) Byte: 2byte Addressing Mode: Immediate Addressing Example: MVI B,22H After execution of MVI B,22H [B] = 22H
Syntax: XRI 8-bit Where 8- bit is an immediate operand data. Byte: 2byte Addressing Mode: Immediate Addressing Working: 1.This is 2 byte instruction. 2. Microprocessor will allocate first byte for opcode and second byte for immediate data. 3. During execution of this instruction, microprocessor will perform Logical XORing operation between content of Accumulator and Immediate data. 4. S, Z and P are modified . Cy and Ac are reset . Example: XRI 22H where [A]= 11H After execution of XRI 22H [A] = 33H A= 11 = 0001 0001 = 22 = 0010 0010 A=33= 0011 0011 FLAG= 00 0 0 0 1 0 0 = 04H
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