Syntax: LDAX Rhp Where Rhp is higher order register the pair. (HL, BC or DE) Byte: 1byte Addressing Mode: Register Indirect Addressing Working: for execution of this instruction, microprocessor will allocate first byte for opcode and the operand is register which don't need allocation. Example: LDAX B where [C]= 50H [B] = 20 H [2050H]= 88H After execution of LDAX B [A]= 88 H
Syntax: LXI Rhp,16-bit Where Rhp is Higher Order Register of the pair. (I.e. BC, DE, HL) Byte: 3byte Addressing Mode: Immediate Addressing Working: For execution of LXI Instruction, microprocessor will allocate first byte for opcode, second byte for lower order address/data and third byte for higher order address/data. Example: LXI H,2200H After execution of LXI H,2200H [L] = 00H [H] = 22H
Syntax: ANI 8-bit Where 8- bit is an immediate operand data. Byte: 2byte Addressing Mode: Immediate Addressing Working: 1.This is 2 byte instruction. 2. Microprocessor will allocate first byte for opcode and second byte for immediate data. 3. During execution of this instruction, microprocessor will perform Logical ANDing operation between content of Accumulator and Immediate data. 4. S, Z and P are modified . Cy is reset(Cy=0) and Ac is set (Ac=1) . Example: ANI 22H where [A]= 11H After execution of ANI 22H [A] = 00H A= 11 = 0001 0001 = 22 = 0010 0010 A=00 0000 0000 FLAG= 01 0 1 0 0 0 0 = 50H
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