I2K - Information2Knowledge

Syntax: SBI 8bit  Where 8-bit is an immediate data operand.  Byte: 2byte Addressing Mode: Immediate   Addressing Working:  1.  2. A= A- 8bit -b 3.  4. Flag Example: SBI 10H where  [A]= 22H and [c flag]= 1 After execution of SBI   10H [A] = 11H  // A= A-8bit-b => 22-10-1 =11H Program: write an ALP for subtraction of 30H value from Registers A  Where A carries 44H and Cy flag carries borrow value 1. Store result at memory location 5000H. Label  Mnemonics  Comments Start:   SBI 30H        ;  a= a-8bit- cy...                                    ; A= 44- 30 -1 = 13h             STA 5000H   Stop: HLT Output: [5000H]= 13H      

Syntax: SBB R Where R can be any of the general purpose registers (A,B,C,D,E,H andL) Byte: 1byte Addressing Mode: Register   Addressing Working:  1.  2. A= A- R-b 3.  4. Flag Example: SBB D where  [D] = 10H , [A]= 22H and [c flag]= 1 After execution of SBB  B [A] = 11H  [D] = 10H // A= A-R-b => 22-10-1 =11H Program: write an ALP for subtraction of values present in Registers A ,B and C. Where A carries 44H and B carries 30H and C carries 10H. Store result at memory location 5000H. Label  Mnemonics  Comments Start: SUB B ;  a=a - b// 44-30= 14h            SBB  C ;  a= a - c - cy... A= 14-10-0 = 4h           STA 5000H   Stop: HLT Output: [5000H]= 04H      

Syntax: SUI 8-bit Where 8-bit is an immediate data operand.  Byte: 2byte Addressing Mode: Immediate   Addressing Working:  1.  2.  3.  4. Flag Example: SUI 11H where    [A]= 22H After execution of SUI 11H [A] = 11H  Program: write an ALP for 8bit subtraction of value present in Register A that is 44H with an immediate value 30H. Store result at memory location 5000H. Label  Mnemonics  Comments Start: SUI 30H           STA 5000H   Stop: HLT Output: [5000H]= 14H                        

Syntax: SUB R Where R can be any of the general purpose registers (A,B,C,D,E,H andL) Byte: 1byte Addressing Mode: Register   Addressing Working:  1.  2.  3.  4. Flag Example: SUB B   where  [B] = 11H  and [A]= 22H After execution of  SUB  B [A] = 11H  [B] = 22H Program: write an ALP for 8bit subtraction  of values present in Registers A and B where A carries 44H and B carries 30H. Store result at memory location 5000H. Label  Mnemonics  Comments Start: SUB B            STA 5000H   Stop: HLT Output: [5000H]= 14H LXI H, 4000H ;  4000= 90h MOV A,M ; a = 90h INX H ;  4001h where 4001= 40h MOV B, M ; b= 4 0h SUB B ; a = a - b ... A = 90 - 40= 50h INX H ;  4002h MOV M,A ;  4002h = 50h HLT            

 JUMP Instruction 1. JMP       : Unconditional Conditional Jump 1. JNZ        2. JZ  3. JNC 4. JC 5. JPO 6. JPE 7. JP 8. JM CALL Instruction   1.  CALL      : Unconditional Conditional Call 1. CNZ        2. CZ  3. CNC 4. CC 5. CPO 6. CPE 7. CP 8. CM   Return Instruction 1. RET       : Unconditional Conditional Return 1. RNZ        2. RZ  3. RNC 4. RC 5. RPO 6. RPE 7. RP 8. RM Restart Instruction  RST n ......(8 -restart instruction in 8085) 1. RST 0 2. RST 1 3. RST 2 4. RST 3 5. RST 4 6. RST 5 7. RST 6 8. RST 7 PCHL ( LOAD PROGRAM COUNTER WITH HL )             

  Syntax: XRI 8-bit Where 8- bit is an immediate operand data. Byte: 2byte Addressing Mode: Immediate Addressing Working:  1.This is 2 byte instruction. 2. Microprocessor will allocate first byte for opcode and second byte for immediate data. 3. During execution of this instruction, microprocessor will perform Logical XORing operation between content of Accumulator and Immediate data. 4. S, Z and  P  are modified . Cy and Ac are reset .   Example: XRI 22H where [A]= 11H After execution of XRI 22H [A] = 33H     A= 11 =  0001 0001  =  22 =  0010 0010  A=33= 0011  0011 FLAG= 00 0 0 0 1 0 0 = 04H

  Syntax: ORI 8-bit Where 8- bit is an immediate operand data. Byte: 2byte Addressing Mode: Immediate Addressing Working:  1.This is 2 byte instruction. 2. Microprocessor will allocate first byte for opcode and second byte for immediate data. 3. During execution of this instruction, microprocessor will perform Logical ORing operation between content of Accumulator and Immediate data. 4. S, Z, P are modified. Cy and Ac are reset (Cy = Ac= 0) . Example: ORI 22H where [A]= 11H After execution of ORI 22H [A] = 33H     A= 11 =  0001 0001  =  22 =  0010 0010  A=33= 0011  0011 FLAG= 00 0 0 0 1 0 0 = 04H

  Syntax: ANI 8-bit Where 8- bit is an immediate operand data. Byte: 2byte Addressing Mode: Immediate Addressing Working:  1.This is 2 byte instruction. 2. Microprocessor will allocate first byte for opcode and second byte for immediate data. 3. During execution of this instruction, microprocessor will perform Logical ANDing operation between content of Accumulator and Immediate data. 4. S, Z and  P  are modified . Cy is reset(Cy=0) and Ac is set (Ac=1) . Example: ANI 22H where [A]= 11H After execution of ANI 22H [A] = 00H     A= 11 =  0001 0001  =  22 =  0010 0010  A=00    0000  0000 FLAG=  01 0 1 0 0 0 0 = 50H

  Syntax: STC    Byte: 1byte   Addressing Mode: Implied Addressing   Flag: Carry Working:  1. Microprocessor will allocate one byte for opcode for execution. 2. During the execution of the instruction microprocessor will set Carry flag. Example1:  STC  where  [Cy] = set = 1 After execution of STC   [Cy] = 1     Example2:  STC  where  [Cy] = reset = 0 After execution of STC   [Cy] = 1   

  Syntax: CMC    Byte: 1byte   Addressing Mode: Implied Addressing   Flag: Carry Working:  1. Microprocessor will allocate one byte for opcode for execution. 2. During the execution of the instruction microprocessor will complement or  perform 1's complement on content of Carry flag. Example: CMC  where  [Cy] = set = 1 After execution of CMC   [Cy] = 0                            

  Syntax: CMA Byte: 1byte Addressing Mode: Implied Addressing Flag: None Working:  1. Microprocessor will allocate one byte for opcode. 2. During the execution of the instruction microprocessor will perform 1's complement on content of Accumulator. Example: CMA  where  [A] = 22H  After execution of CMA    [A] = DD H                             A= 22 H =  0010  0010 1's Complement of A =  1101   1101 = DD H

  Syntax: RRC   Byte: 1byte   Addressing Mode: Implicit Addressing Working:  1. This is one byte instruction. 2. Microproccessor will allocate one byte for opcode RRC and operand is Accumulator i.e. operand will not need memory allocation during execution. 3. Thi s instruction rotates content of Accumulator one bit position towards Right.   i.e. The bit A0 is stored  in carry flag AS WELL AS  will get stored in A7 bit position.   4. C Flag will get affected. Example: RRC   where   [A]= 21H After execution of RRC [A] = 90H     A= 21 =  0010 0001 A7 ->  A6 -> A5 -> A4 -> A3 -> A2 -> A1 -> A0   -> Cy    |___<-____________________________<-_ __| 0         0         1        0       0        ...

  Syntax: RAR   Byte: 1byte   Addressing Mode: Implicit Addressing Working:  1. This is one byte instruction. 2. Microproccessor will allocate one byte for opcode RAR and operand is Accumulator i.e. operand will not need memory allocation during execution. 3. Thi s instruction rotates content of Accumulator one bit position towards Right.   i.e. The bit A0 is stored  in carry flag and content of carry flag will get stored in A7 bit position.   4. C Flag will get affected. Example: RAR   where   [A]= 21H After execution of RAR [A] = 90H     A= 21 =  0010 0001 A7 ->  A6 -> A5 -> A4 -> A3 -> A2 -> A1 -> A0   -> Cy    |___<-____________________________<-________|   0         0         1        0       0    ...

  Syntax: RAL   Byte: 1byte   Addressing Mode: Implicit Addressing Working:  1. This is one byte instruction. 2. Microproccessor will allocate one byte for opcode RAL and operand is Accumulator i.e. operand will not need memory allocation during execution. 3. Thi s instruction rotates content of Accumulator one bit position towards left.   i.e. The bit A7 is stored  in carry flag and content of carry flag will get stored in A0 bit position.   4. C Flag will get affected. Example: RAL   where   [A]= 21H After execution of RAL [A] =43H     A= 21 =  0010 0001 Cy  <-   A7 <- A6 <- A5 <- A4 <- A3 <- A2 <- A1 <- A0   | ___->____________________________->________|   1            0         0         1        0     ...

    Syntax: RLC    Byte: 1byte   Addressing Mode: Implicit Addressing Working:  1. This is one byte instruction. 2. Microproccessor will allocate one byte for opcode RLC and operand is Accumulator i.e. operand will not need memory allocation during execution. 3. Thi s instruction rotates content of Accumulator one bit position towards left.   i.e. The bit A7 is stored in bit position A0  as well as in carry flag. 4. C flag will get affected. Example: RLC   where   [A]= 21H After execution of RLC [A] =42H     A= 21 =  0010 0001 Cy  <-   A7<-A6<-A5<-A4<-A3<-A2<-A1<-A0               |___->__________________________->_|                0         0         1        0...

 EXAMPLES: CMP M ......... Register Indirect Addressing  MOV A, M MOV M, A ANA M ORA M XRA M SUB M  ADD M ADC M SBB M   LXI H 3000H  ; HL = 3000H MOV A,M       ; M = 10H ; M -> A INX H              ;  HL = 3001H CMP M             ; M = 11H,    IF [A] ? [M] ----- ----- [3000H] = 10 [3001H] = 11  

    Syntax: CPI 8-bit Where  8-bit is an immediate data. Byte: 2 byte Addressing Mode: Immediate  Addressing Working:  1. This is Two byte instruction. 2. microprocessor will allocate First byte for opcode CPI and Second byte for immediate operand.   3. T his instruction compares the content of the register R with content of the Accumulator. The comparison is done using subtraction of the content of register from the Accumulator .  The content of Accumulator remains unchanged . Conditions of Comarison:   1. If  [A] < [R] then Cy flag is set i.e. Cy =1 . 2. If [A] = [R]  then Z flag is set i.e Z=1. 3. If [A] > [R]  then Cy and Z flags are reset. i.e Cy = 0 and  Z = 0 4. Flag Example: CPI 22H where [A]= 11H After execution of CPI 22H [A] = 11H   2's complement subtraction: A= 11 =  0001 0001    = 22 =  0010 0010 1's complement of 22 = 1101 1101 2's complement of 22 =   1101 1110   ...

  Syntax: CMP R Where R can be any of the general purpose registers (A,B,C,D,E,H and L) Byte: 1byte Addressing Mode: Register   Addressing Working:  1. This is one byte instruction. 2. microprocessor will allocate one byte for opcode CMP and operands are registers i.e. operands don't need memory allocations for execution here. 3. T his instruction compares the content of the register R with content of the Accumulator. The comparison is done using subtraction of the content of register from the Accumulator .  The content of Accumulator remains unchanged . Conditions of Comarison:   1.  If [A] < [R] then Cy flag is set i.e. Cy =1 . 2. If [A] = [R]  then Z flag is set i.e Z=1. 3. If [A] > [R]  then Cy and Z flags are reset. i.e Cy = 0 and  Z = 0 4. Flag Example: CMP B where  [B] = 22H  and [A]= 11H After execution of CMP B [A] = 11H [B] = 22H   2's complement subtraction: A= 11 =  0001 0001 B= 22 =  0010 0010 1'...

  Syntax: XRA R Where R can be any of the general purpose registers (A,B,C,D,E,H and L) Byte: 1byte Addressing Mode: Register   Addressing Working:  1.This is 1 byte instruction. 2. Microprocessor will allocate first byte for opcode during execution. 3. During execution of this instruction, microprocessor will perform Logical XORing operation between content of Accumulator and operand register. 4. S, Z and  P  are modified . Cy and Ac are reset .   Example: XRA B where  [B] = 52H  and [A]= 11H After execution of XRA B [A] = 43H [B] = 22H     A= 11 =  0001 0001 B= 52 =  0101 0010    A=43    0100  0011       FLAG = 00 0 0 0 0 0 0 = 0 0H  

  Syntax: ORA R Where R can be any of the general purpose registers (A,B,C,D,E,H and L) Byte: 1byte Addressing Mode: Register   Addressing Working:  1.This is 1 byte instruction. 2. Microprocessor will allocate first byte for opcode during execution. 3. During execution of this instruction, microprocessor will perform Logical ORing operation between content of Accumulator and operand register. 4. S, Z, P are modified. Cy and Ac are reset . Example: ORA B where  [B] = 22H  and [A]= 11H After execution of ORA B [A] =33 H [B] = 22H     A= 11 =  0001 0001 B =  22 =0010 0010  A=33= 0011  0011 FLAG= 00 0 0 0 1 0 0 = 04H