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ANI

  Syntax: ANI 8-bit Where 8- bit is an immediate operand data. Byte: 2byte Addressing Mode: Immediate Addressing Working:  1.This is 2 byte instruction. 2. Microprocessor will allocate first byte for opcode and second byte for immediate data. 3. During execution of this instruction, microprocessor will perform Logical ANDing operation between content of Accumulator and Immediate data. 4. S, Z and  P  are modified . Cy is reset(Cy=0) and Ac is set (Ac=1) . Example: ANI 22H where [A]= 11H After execution of ANI 22H [A] = 00H     A= 11 =  0001 0001  =  22 =  0010 0010  A=00    0000  0000 FLAG=  01 0 1 0 0 0 0 = 50H

STC

  Syntax: STC    Byte: 1byte   Addressing Mode: Implied Addressing   Flag: Carry Working:  1. Microprocessor will allocate one byte for opcode for execution. 2. During the execution of the instruction microprocessor will set Carry flag. Example1:  STC  where  [Cy] = set = 1 After execution of STC   [Cy] = 1     Example2:  STC  where  [Cy] = reset = 0 After execution of STC   [Cy] = 1   

CMC

  Syntax: CMC    Byte: 1byte   Addressing Mode: Implied Addressing   Flag: Carry Working:  1. Microprocessor will allocate one byte for opcode for execution. 2. During the execution of the instruction microprocessor will complement or  perform 1's complement on content of Carry flag. Example: CMC  where  [Cy] = set = 1 After execution of CMC   [Cy] = 0                            

CMA

  Syntax: CMA Byte: 1byte Addressing Mode: Implied Addressing Flag: None Working:  1. Microprocessor will allocate one byte for opcode. 2. During the execution of the instruction microprocessor will perform 1's complement on content of Accumulator. Example: CMA  where  [A] = 22H  After execution of CMA    [A] = DD H                             A= 22 H =  0010  0010 1's Complement of A =  1101   1101 = DD H

RRC

  Syntax: RRC   Byte: 1byte   Addressing Mode: Implicit Addressing Working:  1. This is one byte instruction. 2. Microproccessor will allocate one byte for opcode RRC and operand is Accumulator i.e. operand will not need memory allocation during execution. 3. Thi s instruction rotates content of Accumulator one bit position towards Right.   i.e. The bit A0 is stored  in carry flag AS WELL AS  will get stored in A7 bit position.   4. C Flag will get affected. Example: RRC   where   [A]= 21H After execution of RRC [A] = 90H     A= 21 =  0010 0001 A7 ->  A6 -> A5 -> A4 -> A3 -> A2 -> A1 -> A0   -> Cy    |___<-____________________________<-_ __| 0         0         1        0       0        ...

RAR

  Syntax: RAR   Byte: 1byte   Addressing Mode: Implicit Addressing Working:  1. This is one byte instruction. 2. Microproccessor will allocate one byte for opcode RAR and operand is Accumulator i.e. operand will not need memory allocation during execution. 3. Thi s instruction rotates content of Accumulator one bit position towards Right.   i.e. The bit A0 is stored  in carry flag and content of carry flag will get stored in A7 bit position.   4. C Flag will get affected. Example: RAR   where   [A]= 21H After execution of RAR [A] = 90H     A= 21 =  0010 0001 A7 ->  A6 -> A5 -> A4 -> A3 -> A2 -> A1 -> A0   -> Cy    |___<-____________________________<-________|   0         0         1        0       0    ...

RAL

  Syntax: RAL   Byte: 1byte   Addressing Mode: Implicit Addressing Working:  1. This is one byte instruction. 2. Microproccessor will allocate one byte for opcode RAL and operand is Accumulator i.e. operand will not need memory allocation during execution. 3. Thi s instruction rotates content of Accumulator one bit position towards left.   i.e. The bit A7 is stored  in carry flag and content of carry flag will get stored in A0 bit position.   4. C Flag will get affected. Example: RAL   where   [A]= 21H After execution of RAL [A] =43H     A= 21 =  0010 0001 Cy  <-   A7 <- A6 <- A5 <- A4 <- A3 <- A2 <- A1 <- A0   | ___->____________________________->________|   1            0         0         1        0     ...